WS2812-Puck added
This commit is contained in:
Nis Wechselberg
parent
513801a6d6
commit
67c9311501
6 changed files with 85738 additions and 0 deletions
367
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck-cache.lib
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367
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck-cache.lib
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Connector_Conn_01x04_Female
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#
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DEF Connector_Conn_01x04_Female J 0 40 Y N 1 F N
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F0 "J" 0 200 50 H V C CNN
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F1 "Connector_Conn_01x04_Female" 0 -300 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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A 0 -200 20 901 -901 1 1 6 N 0 -180 0 -220
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A 0 -100 20 901 -901 1 1 6 N 0 -80 0 -120
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A 0 0 20 901 -901 1 1 6 N 0 20 0 -20
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A 0 100 20 901 -901 1 1 6 N 0 120 0 80
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P 2 1 1 6 -50 -200 -20 -200 N
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P 2 1 1 6 -50 -100 -20 -100 N
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P 2 1 1 6 -50 0 -20 0 N
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P 2 1 1 6 -50 100 -20 100 N
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X Pin_1 1 -200 100 150 R 50 50 1 1 P
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X Pin_2 2 -200 0 150 R 50 50 1 1 P
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X Pin_3 3 -200 -100 150 R 50 50 1 1 P
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X Pin_4 4 -200 -200 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Connector_USB_B_Micro
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#
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DEF Connector_USB_B_Micro J 0 40 Y Y 1 F N
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F0 "J" -200 450 50 H V L CNN
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F1 "Connector_USB_B_Micro" -200 350 50 H V L CNN
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F2 "" 150 -50 50 H I C CNN
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F3 "" 150 -50 50 H I C CNN
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ALIAS USB_B_Mini
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$FPLIST
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USB*
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$ENDFPLIST
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DRAW
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C -150 85 25 0 1 10 F
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C -25 135 15 0 1 10 F
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S -200 -300 200 300 0 1 10 f
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S -5 -300 5 -270 0 1 0 N
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S 10 50 -20 20 0 1 10 F
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S 200 -205 170 -195 0 1 0 N
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S 200 -105 170 -95 0 1 0 N
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S 200 -5 170 5 0 1 0 N
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S 200 195 170 205 0 1 0 N
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P 2 0 1 10 -75 85 25 85 N
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P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
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P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
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P 4 0 1 10 25 110 25 60 75 85 25 110 F
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P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
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P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
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X VBUS 1 300 200 100 L 50 50 1 1 w
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X D- 2 300 -100 100 L 50 50 1 1 P
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X D+ 3 300 0 100 L 50 50 1 1 P
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X ID 4 300 -200 100 L 50 50 1 1 P
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X GND 5 0 -400 100 U 50 50 1 1 w
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X Shield 6 -100 -400 100 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_C
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#
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DEF Device_C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_C" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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C_*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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P 2 0 1 20 -80 30 80 30 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_CP1
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#
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DEF Device_CP1 C 0 10 N N 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_CP1" 25 -100 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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CP_*
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$ENDFPLIST
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DRAW
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A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50
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P 2 0 1 20 -80 30 80 30 N
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P 2 0 1 0 -70 90 -30 90 N
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P 2 0 1 0 -50 70 -50 110 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 130 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_LED
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#
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DEF Device_LED D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_LED" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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LED*
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LED_SMD:*
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LED_THT:*
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$ENDFPLIST
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DRAW
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P 2 0 1 10 -50 -50 -50 50 N
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P 2 0 1 0 -50 0 50 0 N
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P 4 0 1 10 50 -50 50 50 -50 0 50 -50 N
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P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
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P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_R
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#
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DEF Device_R R 0 0 N Y 1 F N
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F0 "R" 80 0 50 V V C CNN
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F1 "Device_R" 0 0 50 V V C CNN
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F2 "" -70 0 50 V I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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R_*
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$ENDFPLIST
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DRAW
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S -40 -100 40 100 0 1 10 N
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X ~ 1 0 150 50 D 50 50 1 1 P
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X ~ 2 0 -150 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Diode_1N5819
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#
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DEF Diode_1N5819 D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Diode_1N5819" 0 -100 50 H V C CNN
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F2 "Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal" 0 -175 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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ALIAS SB130 SB140 SB150 SB160 1N5817 1N5818 1N5819
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$FPLIST
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D*DO?41*
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$ENDFPLIST
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DRAW
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P 2 0 1 0 50 0 -50 0 N
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P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
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P 6 0 1 10 -75 25 -75 50 -50 50 -50 -50 -25 -50 -25 -25 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Interface_USB_CH340C
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#
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DEF Interface_USB_CH340C U 0 20 Y Y 1 F N
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F0 "U" -200 550 50 H V R CNN
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F1 "Interface_USB_CH340C" 50 550 50 H V L CNN
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F2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" 50 -550 50 H I L CNN
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F3 "" -350 800 50 H I C CNN
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$FPLIST
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SOIC*3.9x9.9mm*P1.27mm*
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$ENDFPLIST
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DRAW
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S -300 500 300 -500 0 1 10 f
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X GND 1 0 -600 100 U 50 50 1 1 W
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X ~DSR 10 400 0 100 L 50 50 1 1 I
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X ~RI 11 400 -100 100 L 50 50 1 1 I
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X ~DCD 12 400 -200 100 L 50 50 1 1 I
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X ~DTR 13 400 -300 100 L 50 50 1 1 O
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X ~RTS 14 400 -400 100 L 50 50 1 1 O
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X R232 15 -400 300 100 R 50 50 1 1 I
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X VCC 16 0 600 100 D 50 50 1 1 W
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X TXD 2 400 400 100 L 50 50 1 1 O
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X RXD 3 400 300 100 L 50 50 1 1 I
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X V3 4 -100 600 100 D 50 50 1 1 P
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X UD+ 5 -400 100 100 R 50 50 1 1 B
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X UD- 6 -400 0 100 R 50 50 1 1 B
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X NC 7 -300 -300 100 R 50 50 1 1 N N
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X NC 8 -300 -400 100 R 50 50 1 1 N N
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X ~CTS 9 400 100 100 L 50 50 1 1 I
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ENDDRAW
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ENDDEF
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#
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# RF_Module_ESP-12E
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#
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DEF RF_Module_ESP-12E U 0 20 Y Y 1 F N
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F0 "U" -500 750 50 H V L CNN
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F1 "RF_Module_ESP-12E" 500 750 50 H V R CNN
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F2 "RF_Module:ESP-12E" 0 0 50 H I C CNN
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F3 "" -350 100 50 H I C CNN
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ALIAS ESP-12F
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$FPLIST
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ESP?12*
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$ENDFPLIST
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DRAW
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S -500 700 500 -600 0 1 10 f
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X ~RST 1 -600 600 100 R 50 50 1 1 I
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X MISO 10 -600 -100 100 R 50 50 1 1 B
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X GPIO9 11 -600 -200 100 R 50 50 1 1 B
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X GPIO10 12 -600 -300 100 R 50 50 1 1 B
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X MOSI 13 -600 -400 100 R 50 50 1 1 B
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X SCLK 14 -600 -500 100 R 50 50 1 1 B
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X GND 15 0 -700 100 U 50 50 1 1 W
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X GPIO15 16 600 -300 100 L 50 50 1 1 B
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X GPIO2 17 600 400 100 L 50 50 1 1 B
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X GPIO0 18 600 600 100 L 50 50 1 1 B
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X GPIO4 19 600 200 100 L 50 50 1 1 B
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X ADC 2 -600 200 100 R 50 50 1 1 I
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X GPIO5 20 600 100 100 L 50 50 1 1 B
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X GPIO3/RXD 21 600 300 100 L 50 50 1 1 B
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X GPIO1/TXD 22 600 500 100 L 50 50 1 1 B
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X EN 3 -600 400 100 R 50 50 1 1 I
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X GPIO16 4 600 -400 100 L 50 50 1 1 B
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X GPIO14 5 600 -200 100 L 50 50 1 1 B
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X GPIO12 6 600 0 100 L 50 50 1 1 B
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X GPIO13 7 600 -100 100 L 50 50 1 1 B
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X VCC 8 0 800 100 D 50 50 1 1 W
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X CS0 9 -600 0 100 R 50 50 1 1 I
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ENDDRAW
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ENDDEF
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#
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# Regulator_Linear_LM1117-3.3
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#
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DEF Regulator_Linear_LM1117-3.3 U 0 10 Y Y 1 F N
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F0 "U" -150 125 50 H V C CNN
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F1 "Regulator_Linear_LM1117-3.3" 0 125 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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ALIAS LM1117-2.5 LM1117-3.3 LM1117-5.0 TLV1117-15 TLV1117-18 TLV1117-25 TLV1117-33 TLV1117-50
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$FPLIST
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SOT?223*
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TO?263*
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TO?252*
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TO?220*
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$ENDFPLIST
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DRAW
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S -200 -200 200 75 0 1 10 f
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X GND 1 0 -300 100 U 50 50 1 1 W
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X VO 2 300 0 100 L 50 50 1 1 w
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X VI 3 -300 0 100 R 50 50 1 1 W
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ENDDRAW
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ENDDEF
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#
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# Switch_SW_Push
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#
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DEF Switch_SW_Push SW 0 40 N N 1 F N
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F0 "SW" 50 100 50 H V L CNN
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F1 "Switch_SW_Push" 0 -60 50 H V C CNN
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F2 "" 0 200 50 H I C CNN
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F3 "" 0 200 50 H I C CNN
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DRAW
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C -80 0 20 0 1 0 N
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C 80 0 20 0 1 0 N
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P 2 0 1 0 0 50 0 120 N
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P 2 0 1 0 100 50 -100 50 N
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X 1 1 -200 0 100 R 50 50 0 1 P
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X 2 2 200 0 100 L 50 50 0 1 P
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ENDDRAW
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ENDDEF
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#
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# Transistor_BJT_S8050
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#
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DEF Transistor_BJT_S8050 Q 0 0 Y N 1 F N
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F0 "Q" 200 75 50 H V L CNN
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F1 "Transistor_BJT_S8050" 200 0 50 H V L CNN
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F2 "Package_TO_SOT_THT:TO-92_Inline" 200 -75 50 H I L CIN
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F3 "" 0 0 50 H I L CNN
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$FPLIST
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TO?92*
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$ENDFPLIST
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DRAW
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C 50 0 111 0 1 10 N
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P 2 0 1 0 0 0 25 0 N
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P 2 0 1 0 25 25 100 100 N
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P 3 0 1 0 25 -25 100 -100 100 -100 N
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P 3 0 1 20 25 75 25 -75 25 -75 N
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P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
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X E 1 100 -200 100 U 50 50 1 1 P
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X B 2 -200 0 200 R 50 50 1 1 I
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X C 3 100 200 100 D 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# power_+3V3
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#
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DEF power_+3V3 #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_+3V3" 0 140 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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ALIAS +3.3V
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +3V3 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_+5V
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#
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DEF power_+5V #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_+5V" 0 140 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +5V 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_GND
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#
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DEF power_GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "power_GND" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GND 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_PWR_FLAG
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#
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DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
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F0 "#FLG" 0 75 50 H I C CNN
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F1 "power_PWR_FLAG" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
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X pwr 1 0 0 0 U 50 50 0 0 w
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ENDDRAW
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ENDDEF
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#
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# power_VBUS
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#
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DEF power_VBUS #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_VBUS" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X VBUS 1 0 0 0 U 50 50 1 1 W N
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||||
ENDDRAW
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||||
ENDDEF
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||||
#
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#End Library
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2127
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.kicad_pcb
Normal file
2127
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
248
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.pro
Normal file
248
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.pro
Normal file
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@ -0,0 +1,248 @@
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update=So 26 Jul 2020 22:49:11 CEST
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version=1
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last_client=kicad
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[general]
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version=1
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RootSch=
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BoardNm=
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[cvpcb]
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version=1
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NetIExt=net
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[eeschema]
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version=1
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LibDir=
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[eeschema/libraries]
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[pcbnew]
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version=1
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PageLayoutDescrFile=
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LastNetListRead=ESP8266-WS2812-Puck.net
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||||
CopperLayerCount=2
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||||
BoardThickness=1.6
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||||
AllowMicroVias=0
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||||
AllowBlindVias=0
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||||
RequireCourtyardDefinitions=0
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||||
ProhibitOverlappingCourtyards=1
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||||
MinTrackWidth=0.2
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||||
MinViaDiameter=0.4
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||||
MinViaDrill=0.3
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||||
MinMicroViaDiameter=0.2
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||||
MinMicroViaDrill=0.09999999999999999
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||||
MinHoleToHole=0.25
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||||
TrackWidth1=0.25
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||||
ViaDiameter1=0.8
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||||
ViaDrill1=0.4
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||||
dPairWidth1=0.2
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||||
dPairGap1=0.25
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||||
dPairViaGap1=0.25
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||||
SilkLineWidth=0.12
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||||
SilkTextSizeV=1
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||||
SilkTextSizeH=1
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||||
SilkTextSizeThickness=0.15
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||||
SilkTextItalic=0
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||||
SilkTextUpright=1
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||||
CopperLineWidth=0.2
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||||
CopperTextSizeV=1.5
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||||
CopperTextSizeH=1.5
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||||
CopperTextThickness=0.3
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||||
CopperTextItalic=0
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||||
CopperTextUpright=1
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||||
EdgeCutLineWidth=0.05
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||||
CourtyardLineWidth=0.05
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||||
OthersLineWidth=0.15
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||||
OthersTextSizeV=1
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||||
OthersTextSizeH=1
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||||
OthersTextSizeThickness=0.15
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||||
OthersTextItalic=0
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||||
OthersTextUpright=1
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||||
SolderMaskClearance=0.05
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||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=1
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=Pcbnew
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
||||
1013
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.sch
Normal file
1013
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.sch
Normal file
File diff suppressed because it is too large
Load diff
1013
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.sch-bak
Normal file
1013
ESP8266-WS2812-Puck/ESP8266-WS2812-Puck.sch-bak
Normal file
File diff suppressed because it is too large
Load diff
80970
ESP8266-WS2812-Puck/fp-info-cache
Normal file
80970
ESP8266-WS2812-Puck/fp-info-cache
Normal file
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue